Embedded Technologies, Inc.

DMA Core for PCIe Hard IP

Description

iWave provides the user application for PCI-e target bridge to access the control & status registers of custom logic and data transfers to custom logic. In addition multi-channel scatter gather DMA core provides the hardware assisted high speed data transfers between the PCI-e and custom logic. This IP core simplifies the integration of PCI-e hard macro controller with custom logic.

Product Specifications
  • TLP Encoding and Decoding
  • Completion packet handling done by target bridge
  • Integrated Arbiter with round robin fashion
  • 32/64 bit AXI stream user interface from PCIe Hard IP depends on no. of PCIe lanes
  • User interface operating frequency is 62.5/125 MHz
  • Simple synchronous target interface to access custom logic
  • Altera version supports these devices: Cyclone IV G, Aria II GX, Statix IV GX and Stratix V GX
  • Supports Legacy and MSI Interrupts
  • Scatter-gather DMA controller for high performance8 programmable DMA channels
    • Simple synchronous interface to custom logic
    • Separate channel for data and buffer descriptor transfer
    • Scattered/Contiguous Buffer descriptor support
    • Auto-increment or constant address pointer feature
    • Mask-able error, status and data completion interrupts

  • Xilinx version supports these devices: Spartan 6, Virtex 5 and Virtex 6

Highlights

  • TLP Encoding &Decoding and completion packet handling simplifies integration of customlogic with PCI-e
  • Easy to use scatter gather DMA controller