Embedded Technologies, Inc.

ARINC 818-2 IP Core

Description

iWave's ARINC IP core is ARINC 818–compliant, which can be implemented on any transceiver based FPGA. It can be used for both transmit-and-receive applications. This core has flexible user interface, allowing for various video parameter configuration. This IP core supports Line Synchronous Mode.

Product Specifications
  • Streaming Interface used as Video TX and RX interface.
  • Video Input Format Supported.
    • Resolution depends on the FPGA transceiver speed used for implementation
    • For SXGA (1280x1024@60Hz) resolution, required data rate is 2.5Gbps

  • Pixel Format supported.
    • Monochrome
    • RGB
    • YcbCr
    • RGBA

  • Pixel Aspect ratio supported.
    • 1:1
    • 1:1.2
    • 1.2:1
    • NTSC (approx 8:9)
    • PAL (16:15)

  • Frame Rate supported.
    • 15fps
    • 20fps
    • 24
    • 24 * 1000 / 1001
    • 25 (PAL)
    • 30
    • 30 * 1000 / 1001 (29.97 NTSC)
    • 60
    • 50
    • 60 * 1000 / 1001 (59.94 NTSC)
    • 50 (VESA DMT)
    • 60 (VESA DMT)
    • 75 (VESA DMT)
    • 85 (VESA DMT)
    • 50 (VESA CVT)
    • 60 (VESA CVT)
    • 75 (VESA CVT)
    • 85 (VESA CVT)

  • Pixel Table Number supported
    • 8-bit Components, four components per transmission word

  • Pixel Array Order supported
    • Left to Right, Top to Bottom

  • Line Synchronous Mode supported
  • 32-bit Full Image CRC supported
  • Following are user configurable parameters
    • No. Of rows
    • No.of Columns
    • Video Format Code
    • Pixel Aspect Ratioe
    • Video Frame rate
    • Color Information Code

Highlights

  • Core has user interface through which video parameter can be configurable as per customer's Interface Control Document(ICD).